This application claims priority of Korean Patent Application No. 10-2004-0011819, filed on Feb. 23, 2004, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference.
1. Field of the Invention
The present invention relates to a lead frame and a method for manufacturing a semiconductor package with the same, and more particularly, to a lead frame for connecting a semiconductor chip to an outer circuit, the lead frame being manufactured with a pre-plated frame. The present invention further relates to a method for fabricating a semiconductor package with such a lead frame.
2. Description of the Related Art
As shown in FIG. 1, a conventional lead frame typically includes a die pad 110 and a plurality of leads 120 arranged around the die pad 110. The die pad 110 is connected to a rail or outer flame 170 by pad supports 180 to support a semiconductor chip on the die pad 110. The leads 120 include inner leads 130 and outer leads 140. A damper portion 160 is disposed between the inner and outer leads 130 and 140 to support them while maintaining a gap between the inner and outer leads 130 and 140. When an assembly of the semiconductor package is completed, the outer flame 170 and the damper portion 160 are cut out.
FIG. 2 shows a semiconductor package 105 containing a lead frame depicted in FIG. 1, in which a semiconductor chip 50 is mounted on the lead frame.
Referring to FIG. 2, the semiconductor chip 50 is mounted on the die pad 110. The inner leads 130 are wire-bonded to the semiconductor chip 50 by a wire 52, and the outer leads 140 are electrically connected to an external circuit (not shown). Accordingly, the leads 120 have a bonding portion W that is wire-bonded to the semiconductor chip 50, an outer bonding portion S connected to the outer circuit and bending portions B bent at an intermediate portion of the leads 120.
The semiconductor chip 50 and the inner leads 130 are molded with resin 55 to form the semiconductor package 105. In manufacturing such a semiconductor package 105, there is a need for improving the wire boning property between the semiconductor chip 50 and the inner leads 130. For this, solder containing Sn—Pb may be deposited on a predetermined area of the outer leads 140. However since this process must be performed through a wet process after the resin molding process is performed, the reliability of the product may be deteriorated.
To solve this problem, a pre-plate frame has been proposed. In this method, metal having a superior solder-wettability is pre-deposited before the semiconductor packaging process so that the solder plating process can be omitted in the post semiconductor packaging process. The lead frame using the pre-plated frame makes the post packaging process simple. In addition, environmental pollution can be prevented since soldering can be omitted in the semiconductor packaging process.
However, since the semiconductor chip bonding, wire boding, epoxy molding, and soldering processes are performed at a temperature generally above 200° C., it becomes important to properly select the outer plating layers when the lead frame is formed with the pre-plated frame.
Describing more specifically, the outer plating layers of the pre-plated lead frame must be good in the oxidation property at a high temperature, in the bonding property for bonding with the bonding wire, in the adhering property for attaching with the chip formed typically of silicon, in the bonding property for bonding with the epoxy resin, and in the deliquescence with the solder for soldering. Furthermore, the outer plating layers must have a proper ductility to prevent the bonding capillary from being worn during the wire bonding process. In addition, the outer plating layers must have a property for preventing the migration phenomenon that may cause the short circuit as the plated metal is diffused to a contact medium for a long time under a high temperature and humidity condition in order to obtain a long term reliability of the semiconductor device.
FIG. 3 illustrates a construction of a lead frame disclosed in U.S. Pat. No. 6,518,508 that is assigned to the co-assignee of this application. This lead frame may be manufactured through a conventional method for forming a pre-plated frame that can satisfy the above-described conditions.
Referring to FIG. 3, the lead frame 120 includes a base metal layer 121 formed of copper, copper alloy or an iron-nickel alloy, a Ni plating layer 122 formed of nickel or nickel alloy and deposited at least on an upper surface of the base metal layer 121, a Pd plating layer 123 formed of palladium or palladium alloy and deposited on the Ni plating layer 122, and a protective plating layer 124 formed of Ag or Ag alloy and deposited on the Pd plating layer 123.
Such lead frames that are formed through the known pre-plating methods have a good effect when the lead frames are not damaged for example by an outer shock or the like. However, since the lead frames must go through a bending process during a conventional semiconductor package assembling process, the plating structure at the bending portion can be cracked and corroded. This problem may be more severe when the base metal layer 121 is formed of alloy 42 rather than cooper or cooper alloy. As well known in the art, alloy 42 is composed of 42% Ni and 58% Fe, and widely used as a base material for the lead frame. However, since the alloy 42 is greatly different in the dielectric characteristics from that of the over layer metals such as Pd, Au and Ag of the Pd plating layer 123 and the protective plating layer 124, a galvanic coupling may be occurred, which may facilitate a severe corrosion of the base metal layer 121.
Particularly, referring to FIG. 4, during the lead frame manufacturing process, cracks or other defects may be easily incurred, thereby causing portions of the protective plating layer 124 to be easily chipped off. When the protective plating layer 124 is chipped off or otherwise damaged, inner layers such as the base metal layer 121 and Ni plating layer 122 can be exposed to oxygen contained in the air. Corrosion can be more easily developed at the exposed portions (such as portion 120c in the figure) due to the galvanic coupling.
Where the Pd plating layer 123 is plated on the Ni plating layer 122 formed on the defective portions through an electroplating process as shown, a large amount of hydrogen is mixed with the educed Pd components because the education potential of Pd is similar to that of the hydrogen, and the Pd plating layer 123 can be damaged more quickly. Accordingly, cracks may be easily developed at wired bonding portions W and soldering portions S of the lead frame 120. In addition, as it is common to form the Ni, Pd and protective plating layers through the electroplating process, the electroplating of the plating layers has a tendency to deteriorate ductility of the lead frame. Accordingly, when the bending portions B are formed in the lead frame, cracks may be easily developed at the bending portions B.
Because the cracks can easily be developed at the bending portions B, the wire-bonding portions W of the lead frame, and the soldering portions S of the external leads, these cracked portions are readily exposed to the air, and the galvanic coupling is increasingly occurred at these portions. As a result, the exposed portions may be easily corroded.
Furthermore, in the course of forming the Pd and Ni plating layers, a large amount of hydrogen is mixed with the lead frame. As a result, the deposition density of the Pd and Ni plating layers is degraded, thereby deteriorating the overall reliability of the lead frame.